Computer aided design (CAD) tools are often used for creating and validating electronic designs such as systems, chips, and other logical representations of items to be created under certain rules or conditions. An electronic design automation (EDA) system is one type of CAD tool for creating electronic designs.
EDA tools are often used for performing design rule compliance verification, and/or correction of design rule violations such as rules (e.g. conditions) corresponding to timing analysis, and may further include, enforcement of performance parameters. Generally, modern electronic devices are required to be made using these EDA tools. This is necessitated in part by the infrastructure that is used in the manufacture of these devices and in part because of the size of the elements that make up these devices, e.g. nanometer level features.
However, as these circuits have become more complex, timing analysis has played a larger and larger role in determining how well chips should perform and what levels of yield and reliability those chips should have. Unfortunately, current techniques focus on analyzing paths independently which fails to account for interrelations between paths.
Therefore, what is needed is an improved approach for yield calculation using statistical timing data that accounts for path and stage delay correlation.